Parallel Probabilistic Inference on Cache-coherent Multiprocessors

Probabilistic inference is a technique used in expert systems for reasoning under uncertainty. A typical inference task is to determine the probability of some events (say diseases) given evidence about other events (say ndings). Inference is conveniently represented as the propagation of evidence in a graph called a belief network. Probabilistic inference is computationally very expensive (NP-hard in general), but is very important both in itself and to calibrate less expensive approximate schemes. It is therefore natural to explore speeding up inference exploiting parallelism. Probabilistic inference aaords concurrency at two diierent levels and presents interesting tradeoos between load balance and data locality. We present two parallel implementations of probabilistic inference in belief networks. One uses a static assignment of work to processors but sacriices some available concurrency, while the other uses dynamic assignment to obtain both forms of concurrency but sacriices some types of data locality. We provide detailed performance measurements and analysis for both implementations on two cache-coherent shared-address-space multiprocessors: a 32-processor Stanford DASH multiprocessor with physically distributed main memory, and a 16-processor bus based SGI Challenge XL with centralized main memory. We nd that the static assignment scheme produces better results uniformly over all input networks on both machines since it has better locality properties. To understand scalability with problem size, number of processors and cache organization, we perform software simulations of the multiprocessor execution and provide a detailed characterization of the spatial and temporal data locality. We nd that temporal locality is low due to both large size of the working sets and low reuse of data, while spatial locality is high. Our results suggest that probabilistic inference is both successful on moderate-scale cache-coherent machines, as well as a good benchmark for testing the memory and communication architectures of these machines due to its emphasis on the data locality.